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ii
- 消除组合逻辑产生的毛刺，可以设计一个系统消除在FPGA设计中常见的毛刺现象-To eliminate glitches generated by combinational logic, you can design a system in the FPGA design to eliminate common glitch phenomenon
s3astarter_schematic
- 一个关于Spartan-3A的电路设计原理图，特别能帮助FPGA设计人员进行设计开发。具有绝对高的参考价值。-One on the Spartan-3A schematic circuit design, in particular, can help FPGA designers to design and development. Absolutely a high reference value.
a
- 状态的学习资料，可以掌握FPGA设计中状态机的使用，非常好的一个文档-The state of learning materials, you can master the FPGA design, the use of state machines, a very good document
b
- FPGA设计流程，使用者要求有一定的FPGA基础，可以在这个文档的基础上了解更多的FPGA设计方法-FPGA design flow, the user requires a certain degree of FPGA-based, you can on the basis of this document to learn more about FPGA design methodology. . . . . .
c
- 一个不错的FPGA设计技巧总结，只要你有一定的FPGA基础，就能对你产生帮助-FPGA design skills a good summary, as long as you have a certain amount of FPGA-based, we can help you generate
VHDL_fire_alarm_detection
- vhdl source code of fire detection system/fire alarm system especially for high rise building? This among the requirement :- according to my "fire detection system for tall building" project by using Spartan 3E FPGA, the vhdl program need
ONEANDTWODIMENSIONALORDERSTATISTICFILTERDESIGN.ra
- The FPGA design for both one- and two-dimensional order statistic filters is developed based on an efficient approach for implementing such filters in binary domain. The order statistic filters are configurable so that different order statistic
SDH_dxoc
- 该文档是基于FPGA技术的SDH交换芯片设计与实现，有需要的可以参考学习。-This document is based on FPGA technology, SDH switching chip design and implementation, where necessary, can refer to the study.
verilog_dpll_
- 该源代码是用FPGA实现数字锁相环的逻辑，有需要的可以借鉴参考一下。-The source code is to use FPGA implementation of digital phase-locked loop logic, those in need can draw reference.
schem_stratixii_dsp_s180
- Altera官方基于EP2S180 FPGA的信号处理实验板，可以进行一些非常复杂的数字信号处理实验。-Altera s official EP2S180 FPGA-based signal processing experiment board, you can do some very complex digital signal processing experiments.
20081030110628915
- FPGA有价值的27例，用VHDL写的，可以-FPGA value in 27 cases, using VHDL to write, they can have a good look
12
- 函数发生器的设计，是基于FPGA。本设计的频率、相位和幅度都是可读的，而且是可控制的-Function generator design is based on the FPGA. The design of frequency, phase and amplitude are readable, but can be controlled
digitalfreq
- 由于本人没有多少很好的源码，所以只能上传目前所做项目的相关参考文献资料。资料一的内容是数字分频器的参考文献，在fpga中数字分频器用的很多，文献对于设计小数分频器有一定的参考价值。-I am not much good as the source, we can only upload now doing projects related reference materials. Information content of a digital divider references in the
1324
- FPGA工程师面试试题集锦，对于即将毕业的同学特别有用，可以提前准备一下面试的东西-FPGA engineer interview questions highlights, for graduate students is particularly useful, you can prepare ahead of time about what the interview
uart
- this is a code for uart implementation........... this can be implimented on a fpga board-this is a code for uart implementation........... this can be implimented on a fpga board........
TRDB_LTM
- NEEK lcd data sheet provides with the functional descr iption of how lcd can be interfaced with the help of fpga on the NEEK board.
des3
- 介绍des加密以及解密的三片文章，是用FPGA实现的。能加深对des加密以及解密的原理的理解。对用FPGA来实现des加密以及解密有帮助。-Descr iption des encryption and decryption of the three articles is the use of FPGA implemented. Can deepen their understanding of des encryption and decryption of the principle of
bishe
- RISC_CPU的设计不仅简化了指令系统，而且还通过简化指令系统使计算机的结构更加简单合理，从而提高了运算速度。本设计以硬件描述语言代码形式存在可与任何综合库、工艺库以及FPGA结合开发出用户需要的固核和硬核，可读性好，易于扩展使用。-RISC_CPU not only simplifies the design of instruction, but instruction by simplifying the structure of the computer is more simple
DesignCPCIanalogonFPGA
- 本文实现了8通道的12位D/A模拟输出板卡的设计。该设计是基于FPGA的3U CPCI板卡，可以提供8通道的模拟电压和电流输出，各路电压输出范围可以配置成0~5V、0~10V、-5~5V或-10V~10V，各路输出电流可以配置成4~20mA、0~20mA或0~24mA。本设计摒弃了常规的CPCI接口芯片，采用FPGA十PCI IP CORE的设计方案，大幅度提高了系统的集成度和调试速度，缩短了系统的开发周期。方案使用专门的WDM (windows driver model)开发工具Driver
LPC21xxVHLDdaima
- 根据lpc21xx定时器的功能用FPGA进行编程，可以实现他的相应功能。-According lpc21xx timer function with FPGA programming, he can achieve the corresponding functions.